作业帮英语翻译The VLIW architecture defines a 64-bit instruction bundl
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英语翻译
The VLIW architecture defines a 64-bit instruction bundle.Instructions that are common for computation can be encoded into a three-instruction bundle that issues into scalar execution pipelines.
For computationally-intense applications,the Tilera compiler generates tight three-instruction per bundle sequences and loops to maximize compute resources and minimize the instruction-stream footprint.
The VLIW architecture defines a 64-bit instruction bundle.Instructions that are common for computation can be encoded into a three-instruction bundle that issues into scalar execution pipelines.
For computationally-intense applications,the Tilera compiler generates tight three-instruction per bundle sequences and loops to maximize compute resources and minimize the instruction-stream footprint.
instruction bundle
指令字符串（或译为：一套指令）
指令字符串（或译为：一套指令）
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